Sunday, February 13, 2011

INTEL 8086-8288 BUS CONTROLLER

8288 BUS CONTROLLER.

The 8288 chip receive the status signal S2,S1, and S0 and the clock from 8086>Theses status signals are decoded to generate MRDC compliment(Memory read command),MWTC compliment(memory write command),IORC compliment (I/O read command),IOWC compliment (I/O write command),INTA compliment(Interrupt acknowledgement) signal.In addition,it can generate advanced memory and I/O write signals AMWC compliment (Advanced memory write command),AIOWC compliment(Advanced I/O write command) that are enabled one clock cycle earlier than the normal write control signals because some device require wider cycle.

The 8288 also can generate bus control signals DEN,DT/R compliment,ALE,MCE/PDEN compliment.The function of the 1 st three signals are the same as those in the minimum mode.The signal MCE/PDEN compliment has 2-functions depending on the mode in which 8288 is operating.The 8288 can either operate in I/O bus mode or system bus mode.When CEN(command enable) and IOB(I/O bus) input pin are wired high,the 8288 operate in I/O bus mode.In this mode ,the signal PDNE compliment functions in the same way as DEN .but it is active only during I/O instruction.This facility enable 8288 to control 2 set of buses:system bus and I/O bus separately.

With AEN compliment (Address enable) and CEN inputs low,The 8288 functions in system bus mode.When multiple processors are sharing the same bus,active processors can be selected byenabling the corresponding 8288 via AEN compliment input.In this mode ,the signal MCE (Master cascade enable) is used for selecting the appropriate interrupt controller.

Get 10-50% offer on all purchace - Flipkart offer zone

3 comments:

 

Copyright @ 2013 7CHIP.

Designed by Templateify & Sponsored By Twigplay